Load Register Offset¶
Ch 11
AGU — Address Generation Unit |
**Group:** Load Register Offset |
**Forms:** 22 |
**Unique mnemonics:** 22
Load instructions with register offsets.
Instructions¶
| Mnemonic | Assembly | Length | Decode | Description |
|---|---|---|---|---|
| LB | lb [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->{t, u, Rd} |
32 | — | Loads a signed 8-bit value from memory. |
| LBU | lbu [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->{t, u, Rd} |
32 | — | Loads a 8-bit value from memory. |
| LD | ld [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->{t, u, Rd} |
32 | — | Loads a 64-bit value from memory. |
| LH | lh [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->{t, u, Rd} |
32 | — | Loads a signed 16-bit value from memory. |
| LHU | lhu [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->{t, u, Rd} |
32 | — | Loads a 16-bit value from memory. |
| LW | lw [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->{t, u, Rd} |
32 | — | Loads a signed 32-bit value from memory. |
| LWU | lwu [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->{t, u, Rd} |
32 | — | Loads a 32-bit value from memory. |
| PRF | prf [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>] |
32 | — | Loads a value from memory into a register. |
| V.LB | v.lb<.local> [SrcL, <lc0>, SrcR<<<shamt>], ->Dst |
64 | — | [64-bit V.] Loads a signed 8-bit value from memory. |
| V.LB.BRG | v.lb.brg<.local> [SrcL, <lc0>, SrcR<<<shamt>], ->Dst |
64 | — | [64-bit V.] Loads a value from memory into a register. |
| V.LBU | v.lbu<.local> [SrcL, <lc0>, SrcR<<<shamt>], ->Dst |
64 | — | [64-bit V.] Loads a 8-bit value from memory. |
| V.LBU.BRG | v.lbu.brg<.local> [SrcL, <lc0>, SrcR<<<shamt>], ->Dst |
64 | — | [64-bit V.] Loads a value from memory into a register. |
| V.LD | v.ld<.local> [SrcL, <lc0<<3>, SrcR<<<shamt>], ->Dst |
64 | — | [64-bit V.] Loads a 64-bit value from memory. |
| V.LD.BRG | v.ld.brg<.local> [SrcL, <lc0<<3>, SrcR<<<shamt>], ->Dst |
64 | — | [64-bit V.] Loads a value from memory into a register. |
| V.LH | v.lh<.local> [SrcL, <lc0<<1>, SrcR<<<shamt>], ->Dst |
64 | — | [64-bit V.] Loads a signed 16-bit value from memory. |
| V.LH.BRG | v.lh.brg<.local> [SrcL, <lc0<<1>, SrcR<<<shamt>], ->Dst |
64 | — | [64-bit V.] Loads a value from memory into a register. |
| V.LHU | v.lhu<.local> [SrcL, <lc0<<1>, SrcR<<<shamt>], ->Dst |
64 | — | [64-bit V.] Loads a 16-bit value from memory. |
| V.LHU.BRG | v.lhu.brg<.local> [SrcL, <lc0<<1>, SrcR<<<shamt>], ->Dst |
64 | — | [64-bit V.] Loads a value from memory into a register. |
| V.LW | v.lw<.local> [SrcL, <lc0<<2>, SrcR<<<shamt>], ->Dst |
64 | — | [64-bit V.] Loads a signed 32-bit value from memory. |
| V.LW.BRG | v.lw.brg<.local> [SrcL, <lc0<<2>, SrcR<<<shamt>], ->Dst |
64 | — | [64-bit V.] Loads a value from memory into a register. |
| V.LWU | v.lwu<.local> [SrcL, <lc0<<2>, SrcR<<<shamt>], ->Dst |
64 | — | [64-bit V.] Loads a 32-bit value from memory. |
| V.LWU.BRG | v.lwu.brg<.local> [SrcL, <lc0<<2>, SrcR<<<shamt>], ->Dst |
64 | — | [64-bit V.] Loads a value from memory into a register. |