LW

32-bit Base **Group:** Load Register Offset  |  Ch 11   AGU — Address Generation Unit  |  **Length:** 32  |  **Decode:** —

Assembly Syntax

• lw [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->{t, u, Rd}

Encoding

Bitfield encoding diagram. MSB is on the left, LSB on the right.

Description

Loads a signed 32-bit value from memory.

Pseudocode (informative)

rd = Load(/* addr */);

Encoding Notes

No additional encoding notes.

Full Catalog Forms

Assembly	Length	Decode
lw [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->{t, u, Rd}	32	—

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