All Instructions

Complete alphabetical index of all 766 instruction forms in the LinxISA v0.58.0 catalog.

Use Ctrl+F / Cmd+F to search, or click a letter below to jump to it.

A | B | C | D | E | F | H | I | J | L | M | O | P | R | S | T | U | V | X

A

Mnemonic	Group	Bits	Description
ACRC	Execution Control	32	Architectural control (ring call). Calls an implementation-defined ACR.
ACRE	Execution Control	32	Architectural control (ring entry). Enters an implementation-defined ACR.
ADD	Arithmetic Operation 64bit	32	Integer addition. Writes the sum of two registers to the destination.
ADDI	Arithmetic Operation 64bit	32	Integer add-immediate. Adds a sign-extended 12-bit immediate to a register.
ADDIW	Arithmetic Operation 32bit	32	32-bit word add-immediate.
ADDTPC	PC-Relative	32	PC-relative addition. Adds an immediate to the current PC/TPC and writes the result.
ADDW	Arithmetic Operation 32bit	32	32-bit word integer addition.
AND	Arithmetic Operation 64bit	32	Bitwise AND of two registers.
ANDI	Arithmetic Operation 64bit	32	Bitwise AND with an immediate.
ANDIW	Arithmetic Operation 32bit	32	32-bit word AND-immediate.
ANDW	Arithmetic Operation 32bit	32	32-bit word bitwise AND.
ASSERT	Execution Control	32	Architectural assertion. Traps if the condition register is zero.

B

Mnemonic	Group	Bits	Description
B.CATR	Bundle Control Attribute	32	Instruction from the Bundle Control Attribute group.
B.DATR	Bundle Data Attribute	32	Instruction from the Bundle Data Attribute group.
B.DIM	Bundle Argument	32	Instruction from the Bundle Argument group.
B.DIM	Bundle Argument	32	Instruction from the Bundle Argument group.
B.DIM	Bundle Argument	32	Instruction from the Bundle Argument group.
B.EQ	Branch	32	Conditional branch taken when SrcL equals SrcR.
B.GE	Branch	32	Conditional branch taken when SrcL is greater than or equal to SrcR (signed).
B.GEU	Branch	32	Conditional branch taken when SrcL is greater than or equal to SrcR (unsigned).
B.HINT	Bundle Hint	32	Instruction from the Bundle Hint group.
B.HINT	Bundle Hint	32	Instruction from the Bundle Hint group.
B.IOR	Bundle Input & Output	32	Instruction from the Bundle Input & Output group.
B.IOT	Bundle Input & Output	32	Instruction from the Bundle Input & Output group.
B.IOT	Bundle Input & Output	32	Instruction from the Bundle Input & Output group.
B.IOT	Bundle Input & Output	32	Instruction from the Bundle Input & Output group.
B.IOT	Bundle Input & Output	32	Instruction from the Bundle Input & Output group.
B.IOT	Bundle Input & Output	32	Instruction from the Bundle Input & Output group.
B.LT	Branch	32	Conditional branch taken when SrcL is less than SrcR (signed).
B.LTU	Branch	32	Conditional branch taken when SrcL is less than SrcR (unsigned).
B.NE	Branch	32	Conditional branch taken when SrcL not equal to SrcR.
B.NZ	Branch	32	Conditional PC-relative branch.
B.TEXT	Bundle Offset	32	Instruction from the Bundle Offset group.
B.Z	Branch	32	Conditional PC-relative branch.
BC.IALL	Cache Maintain	32	Branch-predictor cache invalidate all entries.
BC.IVA	Cache Maintain	32	Branch-predictor cache invalidate by address.
BCNT	Bit Operation	32	Population count. Counts the number of set bits in a register.
BIC	Bit Operation	32	Bit clear / AND-NOT.
BIS	Bit Operation	32	Bit set / OR.
BSE	Execution Control	32	Execution control instruction.
BSTART	Bundle Split	32	Block split marker. Terminates the current basic block and begins the next. Encodes block type and transition kind.
BSTART	Bundle Split	32	Block split marker. Terminates the current basic block and begins the next. Encodes block type and transition kind.
BSTART CALL	BSTART	32	Atomic fused call with independent call-target and return-target fields; transfers to the call block and writes ra. This exact aggregate is distinct from the generic bare-call form, which preserves ra and requires an adjacent SETRET or C.SETRET.
BSTART.FP	Bundle Split	32	Terminates the current block and begins the next.
BSTART.FP	Bundle Split	32	Terminates the current block and begins the next.
BSTART.FP	Bundle Split	32	Terminates the current block and begins the next.
BSTART.FP	Bundle Split	32	Terminates the current block and begins the next.
BSTART.FP	Bundle Split	32	Terminates the current block and begins the next.
BSTART.FP	Bundle Split	32	Terminates the current block and begins the next.
BSTART.FP	Bundle Split	32	Terminates the current block and begins the next.
BSTART.GMOV	Bundle Split	32	Terminates the current block and begins the next.
BSTART.MGATHER	Bundle Split	32	Terminates the current block and begins the next.
BSTART.MGATHER.CAS	Bundle Split	32	Terminates the current block and begins the next.
BSTART.MGATHER.MASK	Bundle Split	32	Terminates the current block and begins the next.
BSTART.MPAR	Bundle Split	32	Terminates the current block and begins the next.
BSTART.MSCATTER	Bundle Split	32	Terminates the current block and begins the next.
BSTART.MSCATTER.MASK	Bundle Split	32	Terminates the current block and begins the next.
BSTART.MSEQ	Bundle Split	32	Terminates the current block and begins the next.
BSTART.STD	Bundle Split	32	Terminates the current block and begins the next.
BSTART.STD	Bundle Split	32	Terminates the current block and begins the next.
BSTART.STD	Bundle Split	32	Terminates the current block and begins the next.
BSTART.STD	Bundle Split	32	Terminates the current block and begins the next.
BSTART.STD	Bundle Split	32	Terminates the current block and begins the next.
BSTART.STD	Bundle Split	32	Terminates the current block and begins the next.
BSTART.STD	Bundle Split	32	Terminates the current block and begins the next.
BSTART.SYS	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TEPL	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TGEMV	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TGEMV.ACC	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TGEMV.BIAS	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TGEMVMX	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TGEMVMX.ACC	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TGEMVMX.BIAS	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TLOAD	Bundle Split	32	Loads a 64-bit value from memory.
BSTART.TMATMUL	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TMATMUL.ACC	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TMATMUL.BIAS	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TMATMULMX	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TMATMULMX.ACC	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TMATMULMX.BIAS	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TMOV	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TMOV	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TMOV	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TMOV	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TMOV	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TPREFETCH	Bundle Split	32	Terminates the current block and begins the next.
BSTART.TSTORE	Bundle Split	32	Stores a register value to memory.
BSTART.TSTORE	Bundle Split	32	Stores a register value to memory.
BSTART.VPAR	Block Split	32	Terminates the current block and begins the next.
BSTART.VSEQ	Block Split	32	Terminates the current block and begins the next.
BSTOP	Bundle Split	32	Block termination marker. Ends the current basic block.
BWE	Execution Control	32	Execution control instruction.
BWI	Execution Control	32	Execution control instruction.
BWT	Execution Control	32	Execution control instruction.
BXS	Bit Operation	32	Bit-field extract signed.
BXU	Bit Operation	32	Bit-field extract unsigned.

C

Mnemonic	Group	Bits	Description
C.ADD	Arithmetic Operation	16	[16-bit C.] Integer addition.
C.ADDI	Arithmetic	16	[16-bit C.] Instruction from the Arithmetic group.
C.AND	Arithmetic Operation	16	[16-bit C.] Bitwise AND.
C.B.DIMI	Bundle Dimension	16	[16-bit C.] Instruction from the Bundle Dimension group.
C.B.IOS	Bundle Shared Operand Binding	16	[16-bit C.] Instruction from the Bundle Shared Operand Binding group.
C.BSTART	Bundle Split	16	[16-bit C.] Terminates the current block and begins the next.
C.BSTART	Bundle Split	16	[16-bit C.] Terminates the current block and begins the next.
C.BSTART.FP	C.BSTART	16	[16-bit C.] Terminates the current block and begins the next.
C.BSTART.MPAR	C.BSTART	16	[16-bit C.] Terminates the current block and begins the next.
C.BSTART.MSEQ	C.BSTART	16	[16-bit C.] Terminates the current block and begins the next.
C.BSTART.STD	C.BSTART	16	[16-bit C.] Terminates the current block and begins the next.
C.BSTART.SYS	C.BSTART	16	[16-bit C.] Terminates the current block and begins the next.
C.BSTART.VPAR	C.BSTART	16	[16-bit C.] Terminates the current block and begins the next.
C.BSTART.VSEQ	C.BSTART	16	[16-bit C.] Terminates the current block and begins the next.
C.BSTOP	Bundle Split	16	[16-bit C.] Marks the end of the current block.
C.CMP.EQI	C.TINST	16	[16-bit C.] Instruction from the C.TINST group.
C.CMP.NEI	C.TINST	16	[16-bit C.] Instruction from the C.TINST group.
C.EBREAK	C.TINST	16	[16-bit C.] Instruction from the C.TINST group.
C.LDI	Load Immediate Offset	16	[16-bit C.] Loads a value from memory into a register.
C.LWI	Load Immediate Offset	16	[16-bit C.] Loads a value from memory into a register.
C.MOVI	Move	16	[16-bit C.] Instruction from the Move group.
C.MOVR	Move	16	[16-bit C.] Instruction from the Move group.
C.OR	Arithmetic Operation	16	[16-bit C.] Bitwise OR.
C.SDI	Store Immediate Offset	16	[16-bit C.] Stores a register value to memory.
C.SETC.EQ	Set Commit Argument	16	[16-bit C.] Sets the block-commit condition.
C.SETC.NE	Set Commit Argument	16	[16-bit C.] Sets the block-commit condition.
C.SETC.TGT	C.UNARY	16	[16-bit C.] Sets the block-commit condition.
C.SETRET	Move	16	[16-bit C.] Instruction from the Move group.
C.SEXT.B	C.UNARY	16	[16-bit C.] Instruction from the C.UNARY group.
C.SEXT.H	C.UNARY	16	[16-bit C.] Instruction from the C.UNARY group.
C.SEXT.W	C.UNARY	16	[16-bit C.] Instruction from the C.UNARY group.
C.SLLI	C.TINST	16	[16-bit C.] Instruction from the C.TINST group.
C.SRLI	C.TINST	16	[16-bit C.] Instruction from the C.TINST group.
C.SSRGET	C.TINST	16	[16-bit C.] Instruction from the C.TINST group.
C.SUB	Arithmetic Operation	16	[16-bit C.] Integer subtraction.
C.SWI	Store Immediate Offset	16	[16-bit C.] Stores a register value to memory.
C.ZEXT.B	C.UNARY	16	[16-bit C.] Instruction from the C.UNARY group.
C.ZEXT.H	C.UNARY	16	[16-bit C.] Instruction from the C.UNARY group.
C.ZEXT.W	C.UNARY	16	[16-bit C.] Instruction from the C.UNARY group.
CASB	Atomic Operation	32	Atomic memory read-modify-write operation.
CASD	Atomic Operation	32	Atomic memory read-modify-write operation.
CASH	Atomic Operation	32	Atomic memory read-modify-write operation.
CASW	Atomic Operation	32	Atomic memory read-modify-write operation.
CLZ	Bit Operation	32	Count leading zeros.
CMP.AND	Compare Instruction	32	Instruction from the Compare Instruction group.
CMP.ANDI	Compare Instruction	32	Instruction from the Compare Instruction group.
CMP.EQ	Compare Instruction	32	Compare equal. Sets destination to 1 if operands are equal.
CMP.EQI	Compare Instruction	32	Instruction from the Compare Instruction group.
CMP.GE	Compare Instruction	32	Compare greater-or-equal (signed).
CMP.GEI	Compare Instruction	32	Instruction from the Compare Instruction group.
CMP.GEU	Compare Instruction	32	Compare greater-or-equal (unsigned).
CMP.GEUI	Compare Instruction	32	Instruction from the Compare Instruction group.
CMP.LT	Compare Instruction	32	Compare less-than (signed).
CMP.LTI	Compare Instruction	32	Instruction from the Compare Instruction group.
CMP.LTU	Compare Instruction	32	Compare less-than (unsigned).
CMP.LTUI	Compare Instruction	32	Instruction from the Compare Instruction group.
CMP.NE	Compare Instruction	32	Compare not-equal.
CMP.NEI	Compare Instruction	32	Instruction from the Compare Instruction group.
CMP.OR	Compare Instruction	32	Instruction from the Compare Instruction group.
CMP.ORI	Compare Instruction	32	Instruction from the Compare Instruction group.
CSEL	Compound Operation	32	Conditional select. Dest = (SrcP != 0) ? SrcL : SrcR.
CTZ	Bit Operation	32	Count trailing zeros.

D

Mnemonic	Group	Bits	Description
DC.CISW	Cache Maintain	32	Data cache clean-and-invalidate by set/way.
DC.CIVA	Cache Maintain	32	Cache maintenance operation.
DC.CSW	Cache Maintain	32	Cache maintenance operation.
DC.CVA	Cache Maintain	32	Cache maintenance operation.
DC.IALL	Cache Maintain	32	Cache maintenance operation.
DC.ISW	Cache Maintain	32	Data cache invalidate by set/way.
DC.IVA	Cache Maintain	32	Data cache invalidate by address.
DC.ZVA	Cache Maintain	32	Cache maintenance operation.
DIV	Multi-Cycle ALU	32	Signed integer division.
DIVU	Multi-Cycle ALU	32	Unsigned integer division.
DIVUW	Multi-Cycle ALU	32	32-bit word unsigned integer division.
DIVW	Multi-Cycle ALU	32	32-bit word signed integer division.
DMA	DMA Operation	32	Instruction from the DMA Operation group.

E

Mnemonic	Group	Bits	Description
EBREAK	Execution Control	32	Environment break instruction. Traps to the debugging or OS handler.
ERCOV	Bundle Split	32	Instruction from the Bundle Split group.
ESAVE	Bundle Split	32	Instruction from the Bundle Split group.

F

Mnemonic	Group	Bits	Description
FABS	Floating-point Arithmetic	32	Floating-point absolute value.
FADD	Floating-point Arithmetic	32	Floating-point addition.
FCVT	Format Convert	32	Floating-point format conversion.
FCVTA	Format Convert	32	Instruction from the Format Convert group.
FCVTM	Format Convert	32	Instruction from the Format Convert group.
FCVTN	Format Convert	32	Instruction from the Format Convert group.
FCVTP	Format Convert	32	Instruction from the Format Convert group.
FCVTZ	Format Convert	32	Instruction from the Format Convert group.
FDIV	Floating-point Arithmetic	32	Floating-point division.
FENCE.D	Execution Control	32	Data memory ordering fence.
FENCE.I	Execution Control	32	Instruction-cache fence. Synchronizes instruction fetch with prior stores.
FENTRY	Bundle Split	32	Instruction from the Bundle Split group.
FEQ	Floating-point Compare	32	Floating-point equality comparison. Writes 1 if ordered and equal.
FEQS	Floating-point Compare	32	Instruction from the Floating-point Compare group.
FEXIT	Bundle Split	32	Instruction from the Bundle Split group.
FEXP	Floating-point Arithmetic	32	Instruction from the Floating-point Arithmetic group.
FGE	Floating-point Compare	32	Floating-point greater-or-equal comparison (ordered).
FGES	Floating-point Compare	32	Instruction from the Floating-point Compare group.
FLT	Floating-point Compare	32	Floating-point less-than comparison (ordered).
FLTS	Floating-point Compare	32	Instruction from the Floating-point Compare group.
FMADD	Floating-point Arithmetic	32	Instruction from the Floating-point Arithmetic group.
FMAX	Max-Min	32	Floating-point maximum.
FMIN	Max-Min	32	Floating-point minimum.
FMSUB	Floating-point Arithmetic	32	Instruction from the Floating-point Arithmetic group.
FMUL	Floating-point Arithmetic	32	Floating-point multiplication.
FNE	Floating-point Compare	32	Instruction from the Floating-point Compare group.
FNES	Floating-point Compare	32	Instruction from the Floating-point Compare group.
FNMADD	Floating-point Arithmetic	32	Instruction from the Floating-point Arithmetic group.
FNMSUB	Floating-point Arithmetic	32	Instruction from the Floating-point Arithmetic group.
FRECIP	Floating-point Arithmetic	32	Instruction from the Floating-point Arithmetic group.
FRET.RA	Bundle Split	32	Instruction from the Bundle Split group.
FRET.STK	Bundle Split	32	Instruction from the Bundle Split group.
FSQRT	Floating-point Arithmetic	32	Floating-point square root.
FSUB	Floating-point Arithmetic	32	Floating-point subtraction.

H

Mnemonic	Group	Bits	Description
HL.ADDI	Arithmetic Operation 64bit	48	[48-bit HL.] Instruction from the Arithmetic Operation 64bit group.
HL.ADDIW	Arithmetic Operation 32bit	48	[48-bit HL.] Instruction from the Arithmetic Operation 32bit group.
HL.ADDTPC	PC-Relative	48	[48-bit HL.] Instruction from the PC-Relative group.
HL.ANDI	Arithmetic Operation 64bit	48	[48-bit HL.] Instruction from the Arithmetic Operation 64bit group.
HL.ANDIW	Arithmetic Operation 32bit	48	[48-bit HL.] Instruction from the Arithmetic Operation 32bit group.
HL.BFI	RESERVE	48	[48-bit HL.] Bit-field insert.
HL.BSTART CALL	BSTART	48	[48-bit HL.] Atomic fused call with independent call-target and return-target fields; transfers to the call block and writes ra. This exact aggregate is distinct from the generic bare-call form, which preserves ra and requires an adjacent SETRET or C.SETRET.
HL.BSTART.FP	BSTART	48	[48-bit HL.] Terminates the current block and begins the next.
HL.BSTART.FP	BSTART	48	[48-bit HL.] Terminates the current block and begins the next.
HL.BSTART.FP	BSTART	48	[48-bit HL.] Terminates the current block and begins the next.
HL.BSTART.FP	BSTART	48	[48-bit HL.] Terminates the current block and begins the next.
HL.BSTART.STD	BSTART	48	[48-bit HL.] Terminates the current block and begins the next.
HL.BSTART.STD	BSTART	48	[48-bit HL.] Terminates the current block and begins the next.
HL.BSTART.STD	BSTART	48	[48-bit HL.] Terminates the current block and begins the next.
HL.BSTART.STD	BSTART	48	[48-bit HL.] Terminates the current block and begins the next.
HL.BSTART.SYS	BSTART	48	[48-bit HL.] Terminates the current block and begins the next.
HL.CASB	Atomic	48	[48-bit HL.] Atomic memory read-modify-write operation.
HL.CASD	Atomic	48	[48-bit HL.] Atomic memory read-modify-write operation.
HL.CASH	Atomic	48	[48-bit HL.] Atomic memory read-modify-write operation.
HL.CASW	Atomic	48	[48-bit HL.] Atomic memory read-modify-write operation.
HL.CCAT	Concat	48	[48-bit HL.] Instruction from the Concat group.
HL.CCATW	Concat	48	[48-bit HL.] Instruction from the Concat group.
HL.CMP.ANDI	Compare Instruction	48	[48-bit HL.] Instruction from the Compare Instruction group.
HL.CMP.EQI	Compare Instruction	48	[48-bit HL.] Instruction from the Compare Instruction group.
HL.CMP.GEI	Compare Instruction	48	[48-bit HL.] Instruction from the Compare Instruction group.
HL.CMP.GEUI	Compare Instruction	48	[48-bit HL.] Instruction from the Compare Instruction group.
HL.CMP.LTI	Compare Instruction	48	[48-bit HL.] Instruction from the Compare Instruction group.
HL.CMP.LTUI	Compare Instruction	48	[48-bit HL.] Instruction from the Compare Instruction group.
HL.CMP.NEI	Compare Instruction	48	[48-bit HL.] Instruction from the Compare Instruction group.
HL.CMP.ORI	Compare Instruction	48	[48-bit HL.] Instruction from the Compare Instruction group.
HL.DIV	Multi-Cycle ALU	48	[48-bit HL.] Signed integer division.
HL.DIVU	Multi-Cycle ALU	48	[48-bit HL.] Unsigned integer division.
HL.DIVUW	Multi-Cycle ALU	48	[48-bit HL.] Instruction from the Multi-Cycle ALU group.
HL.DIVW	Multi-Cycle ALU	48	[48-bit HL.] Instruction from the Multi-Cycle ALU group.
HL.LB.PCR	Load PC-Relative	48	[48-bit HL.] Loads a value from memory into a register.
HL.LB.PO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LB.PR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LBI	Load Long Offset	48	[48-bit HL.] Loads a value from memory into a register.
HL.LBI.PO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LBI.PR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LBIP	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.LBP	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.LBU.PCR	Load PC-Relative	48	[48-bit HL.] Loads a value from memory into a register.
HL.LBU.PO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LBU.PR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LBUI	Load Long Offset	48	[48-bit HL.] Loads a value from memory into a register.
HL.LBUI.PO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LBUI.PR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LBUIP	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.LBUP	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.LD.PCR	Load PC-Relative	48	[48-bit HL.] Loads a value from memory into a register.
HL.LD.PO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LD.PR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LDI	Load Long Offset	48	[48-bit HL.] Loads a value from memory into a register.
HL.LDI.PO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LDI.PR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LDI.U	Load Long Offset	48	[48-bit HL.] Loads a value from memory into a register.
HL.LDI.UPO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LDI.UPR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LDIP	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.LDIP.U	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.LDP	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.LH.PCR	Load PC-Relative	48	[48-bit HL.] Loads a value from memory into a register.
HL.LH.PO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LH.PR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHI	Load Long Offset	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHI.PO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHI.PR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHI.U	Load Long Offset	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHI.UPO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHI.UPR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHIP	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHIP.U	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHP	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHU.PCR	Load PC-Relative	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHU.PO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHU.PR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHUI	Load Long Offset	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHUI.PO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHUI.PR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHUI.U	Load Long Offset	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHUI.UPO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHUI.UPR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHUIP	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHUIP.U	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.LHUP	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.LIS	Long Immediate	48	[48-bit HL.] Instruction from the Long Immediate group.
HL.LIU	Long Immediate	48	[48-bit HL.] Instruction from the Long Immediate group.
HL.LUI	Immediate	48	[48-bit HL.] Instruction from the Immediate group.
HL.LW.PCR	Load PC-Relative	48	[48-bit HL.] Loads a value from memory into a register.
HL.LW.PO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LW.PR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWI	Load Long Offset	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWI.PO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWI.PR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWI.U	Load Long Offset	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWI.UPO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWI.UPR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWIP	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWIP.U	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWP	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWU.PCR	Load PC-Relative	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWU.PO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWU.PR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWUI	Load Long Offset	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWUI.PO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWUI.PR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWUI.U	Load Long Offset	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWUI.UPO	Load Post-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWUI.UPR	Load Pre-Index	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWUIP	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWUIP.U	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.LWUP	Load Pair	48	[48-bit HL.] Loads a value from memory into a register.
HL.MADD	Multi-Cycle ALU	48	[48-bit HL.] Instruction from the Multi-Cycle ALU group.
HL.MADDW	Multi-Cycle ALU	48	[48-bit HL.] Instruction from the Multi-Cycle ALU group.
HL.MIADD	RESERVE	48	[48-bit HL.] Instruction from the RESERVE group.
HL.MISUB	RESERVE	48	[48-bit HL.] Instruction from the RESERVE group.
HL.MUL	Multi-Cycle ALU	48	[48-bit HL.] Integer multiply.
HL.MULU	Multi-Cycle ALU	48	[48-bit HL.] Instruction from the Multi-Cycle ALU group.
HL.ORI	Arithmetic Operation 64bit	48	[48-bit HL.] Instruction from the Arithmetic Operation 64bit group.
HL.ORIW	Arithmetic Operation 32bit	48	[48-bit HL.] Instruction from the Arithmetic Operation 32bit group.
HL.PRF	Prefetch	48	[48-bit HL.] Instruction from the Prefetch group.
HL.PRF.A	Prefetch	48	[48-bit HL.] Instruction from the Prefetch group.
HL.PRFI.U	Prefetch	48	[48-bit HL.] Instruction from the Prefetch group.
HL.PRFI.UA	Prefetch	48	[48-bit HL.] Instruction from the Prefetch group.
HL.QMT	General	48	[48-bit HL.] Instruction from the General group.
HL.QPOP	General	48	[48-bit HL.] Instruction from the General group.
HL.QPUSH	General	48	[48-bit HL.] Instruction from the General group.
HL.REM	Multi-Cycle ALU	48	[48-bit HL.] Signed integer remainder.
HL.REMU	Multi-Cycle ALU	48	[48-bit HL.] Unsigned integer remainder.
HL.REMUW	Multi-Cycle ALU	48	[48-bit HL.] Instruction from the Multi-Cycle ALU group.
HL.REMW	Multi-Cycle ALU	48	[48-bit HL.] Instruction from the Multi-Cycle ALU group.
HL.SB.PCR	Store PC-Relative	48	[48-bit HL.] Stores a register value to memory.
HL.SB.PO	Store Post-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SB.PR	Store Pre-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SBI	Store Long Offset	48	[48-bit HL.] Stores a register value to memory.
HL.SBI.PO	Store Post-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SBI.PR	Store Pre-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SBIP	Store Pair	48	[48-bit HL.] Stores a register value to memory.
HL.SBP	Store Pair	48	[48-bit HL.] Stores a register value to memory.
HL.SD.PCR	Store PC-Relative	48	[48-bit HL.] Stores a register value to memory.
HL.SD.PO	Store Post-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SD.PR	Store Pre-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SD.UPO	Store Post-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SD.UPR	Store Pre-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SDI	Store Long Offset	48	[48-bit HL.] Stores a register value to memory.
HL.SDI.PO	Store Post-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SDI.PR	Store Pre-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SDI.U	Store Long Offset	48	[48-bit HL.] Stores a register value to memory.
HL.SDI.UPO	Store Post-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SDI.UPR	Store Pre-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SDIP	Store Pair	48	[48-bit HL.] Stores a register value to memory.
HL.SDIP.U	Store Pair	48	[48-bit HL.] Stores a register value to memory.
HL.SDP	Store Pair	48	[48-bit HL.] Stores a register value to memory.
HL.SDP.U	Store Pair	48	[48-bit HL.] Stores a register value to memory.
HL.SETC.ANDI	Set Commit Argument	48	[48-bit HL.] Sets the block-commit condition.
HL.SETC.EQI	Set Commit Argument	48	[48-bit HL.] Sets the block-commit condition.
HL.SETC.GEI	Set Commit Argument	48	[48-bit HL.] Sets the block-commit condition.
HL.SETC.GEUI	Set Commit Argument	48	[48-bit HL.] Sets the block-commit condition.
HL.SETC.LTI	Set Commit Argument	48	[48-bit HL.] Sets the block-commit condition.
HL.SETC.LTUI	Set Commit Argument	48	[48-bit HL.] Sets the block-commit condition.
HL.SETC.NEI	Set Commit Argument	48	[48-bit HL.] Sets the block-commit condition.
HL.SETC.ORI	Set Commit Argument	48	[48-bit HL.] Sets the block-commit condition.
HL.SETRET	PC-Relative	48	[48-bit HL.] Instruction from the PC-Relative group.
HL.SH.PCR	Store PC-Relative	48	[48-bit HL.] Stores a register value to memory.
HL.SH.PO	Store Post-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SH.PR	Store Pre-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SH.UPO	Store Post-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SH.UPR	Store Pre-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SHI	Store Long Offset	48	[48-bit HL.] Stores a register value to memory.
HL.SHI.PO	Store Post-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SHI.PR	Store Pre-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SHI.U	Store Long Offset	48	[48-bit HL.] Stores a register value to memory.
HL.SHI.UPO	Store Post-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SHI.UPR	Store Pre-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SHIP	Store Pair	48	[48-bit HL.] Stores a register value to memory.
HL.SHIP.U	Store Pair	48	[48-bit HL.] Stores a register value to memory.
HL.SHP	Store Pair	48	[48-bit HL.] Stores a register value to memory.
HL.SHP.U	Store Pair	48	[48-bit HL.] Stores a register value to memory.
HL.SSRGET	SSR Access	48	[48-bit HL.] Instruction from the SSR Access group.
HL.SSRSET	SSR Access	48	[48-bit HL.] Instruction from the SSR Access group.
HL.SUBI	Arithmetic Operation 64bit	48	[48-bit HL.] Instruction from the Arithmetic Operation 64bit group.
HL.SUBIW	Arithmetic Operation 32bit	48	[48-bit HL.] Instruction from the Arithmetic Operation 32bit group.
HL.SW.PCR	Store PC-Relative	48	[48-bit HL.] Stores a register value to memory.
HL.SW.PO	Store Post-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SW.PR	Store Pre-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SW.UPO	Store Post-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SW.UPR	Store Pre-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SWI	Store Long Offset	48	[48-bit HL.] Stores a register value to memory.
HL.SWI.PO	Store Post-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SWI.PR	Store Pre-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SWI.U	Store Long Offset	48	[48-bit HL.] Stores a register value to memory.
HL.SWI.UPO	Store Post-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SWI.UPR	Store Pre-Index	48	[48-bit HL.] Stores a register value to memory.
HL.SWIP	Store Pair	48	[48-bit HL.] Stores a register value to memory.
HL.SWIP.U	Store Pair	48	[48-bit HL.] Stores a register value to memory.
HL.SWP	Store Pair	48	[48-bit HL.] Stores a register value to memory.
HL.SWP.U	Store Pair	48	[48-bit HL.] Stores a register value to memory.
HL.XORI	Arithmetic Operation 64bit	48	[48-bit HL.] Instruction from the Arithmetic Operation 64bit group.
HL.XORIW	Arithmetic Operation 32bit	48	[48-bit HL.] Instruction from the Arithmetic Operation 32bit group.

I

Mnemonic	Group	Bits	Description
IC.IALL	Cache Maintain	32	Cache maintenance operation.
IC.IVA	Cache Maintain	32	Cache maintenance operation.

J

Mnemonic	Group	Bits	Description
J	Branch	32	Unconditional PC-relative jump to a target label.
JR	Branch	32	Jump register: PC-relative or register-based jump to the address in a register.

L

Mnemonic	Group	Bits	Description
L.BSTART.FP	BSTART	64	Instruction from the BSTART group.
L.BSTART.FP	BSTART	64	Instruction from the BSTART group.
L.BSTART.FP	BSTART	64	Instruction from the BSTART group.
L.BSTART.FP	BSTART	64	Instruction from the BSTART group.
L.BSTART.STD	BSTART	64	Instruction from the BSTART group.
L.BSTART.STD	BSTART	64	Instruction from the BSTART group.
L.BSTART.STD	BSTART	64	Instruction from the BSTART group.
L.BSTART.STD	BSTART	64	Instruction from the BSTART group.
L.BSTART.SYS	BSTART	64	Instruction from the BSTART group.
LB	Load Register Offset	32	Loads a signed 8-bit value from memory.
LB.PCR	Load Symbol	32	Loads a value from memory into a register.
LBI	Load Immediate Offset	32	Loads a value from memory into a register.
LBU	Load Register Offset	32	Loads a 8-bit value from memory.
LBU.PCR	Load Symbol	32	Loads a value from memory into a register.
LBUI	Load Immediate Offset	32	Loads a value from memory into a register.
LD	Load Register Offset	32	Loads a 64-bit value from memory.
LD.ADD	Atomic Operation	32	Atomic memory read-modify-write operation.
LD.AND	Atomic Operation	32	Atomic memory read-modify-write operation.
LD.OR	Atomic Operation	32	Atomic memory read-modify-write operation.
LD.PCR	Load Symbol	32	Loads a value from memory into a register.
LD.SMAX	Atomic Operation	32	Atomic memory read-modify-write operation.
LD.SMIN	Atomic Operation	32	Atomic memory read-modify-write operation.
LD.UMAX	Atomic Operation	32	Atomic memory read-modify-write operation.
LD.UMIN	Atomic Operation	32	Atomic memory read-modify-write operation.
LD.XOR	Atomic Operation	32	Atomic memory read-modify-write operation.
LDI	Load Immediate Offset	32	Loads a value from memory into a register.
LDI.U	Load UnScaled	32	Loads a value from memory into a register.
LH	Load Register Offset	32	Loads a signed 16-bit value from memory.
LH.PCR	Load Symbol	32	Loads a value from memory into a register.
LHI	Load Immediate Offset	32	Loads a value from memory into a register.
LHI.U	Load UnScaled	32	Loads a value from memory into a register.
LHU	Load Register Offset	32	Loads a 16-bit value from memory.
LHU.PCR	Load Symbol	32	Loads a value from memory into a register.
LHUI	Load Immediate Offset	32	Loads a value from memory into a register.
LHUI.U	Load UnScaled	32	Loads a value from memory into a register.
LR.B	Atomic Operation	32	Atomic memory read-modify-write operation.
LR.D	Atomic Operation	32	Atomic memory read-modify-write operation.
LR.H	Atomic Operation	32	Atomic memory read-modify-write operation.
LR.W	Atomic Operation	32	Atomic memory read-modify-write operation.
LSRGET	SSR Access	32	Instruction from the SSR Access group.
LUI	Immediate	32	Load upper immediate. Materializes a 20-bit constant in the upper bits of the destination.
LW	Load Register Offset	32	Loads a signed 32-bit value from memory.
LW.ADD	Atomic Operation	32	Atomic memory read-modify-write operation.
LW.AND	Atomic Operation	32	Atomic memory read-modify-write operation.
LW.OR	Atomic Operation	32	Atomic memory read-modify-write operation.
LW.PCR	Load Symbol	32	Loads a value from memory into a register.
LW.SMAX	Atomic Operation	32	Atomic memory read-modify-write operation.
LW.SMIN	Atomic Operation	32	Atomic memory read-modify-write operation.
LW.UMAX	Atomic Operation	32	Atomic memory read-modify-write operation.
LW.UMIN	Atomic Operation	32	Atomic memory read-modify-write operation.
LW.XOR	Atomic Operation	32	Atomic memory read-modify-write operation.
LWI	Load Immediate Offset	32	Loads a value from memory into a register.
LWI.U	Load UnScaled	32	Loads a value from memory into a register.
LWU	Load Register Offset	32	Loads a 32-bit value from memory.
LWU.PCR	Load Symbol	32	Loads a value from memory into a register.
LWUI	Load Immediate Offset	32	Loads a value from memory into a register.
LWUI.U	Load UnScaled	32	Loads a value from memory into a register.

M

Mnemonic	Group	Bits	Description
MADD	Multi-Cycle ALU	32	Multiply-add: Dest = SrcD + SrcL * SrcR.
MADDW	Multi-Cycle ALU	32	32-bit word multiply-add.
MAX	Max-Min	32	Integer max (signed).
MAXU	Max-Min	32	Instruction from the Max-Min group.
MCOPY	Bundle Split	32	Instruction from the Bundle Split group.
MIN	Max-Min	32	Integer min (signed).
MINU	Max-Min	32	Instruction from the Max-Min group.
MSET	Bundle Split	32	Instruction from the Bundle Split group.
MUL	Multi-Cycle ALU	32	Integer multiply (lower product written to destination).
MULU	Multi-Cycle ALU	32	Integer multiply (unsigned).
MULUW	Multi-Cycle ALU	32	32-bit word integer multiply (unsigned).
MULW	Multi-Cycle ALU	32	32-bit word integer multiply.

O

Mnemonic	Group	Bits	Description
OR	Arithmetic Operation 64bit	32	Bitwise OR of two registers.
ORI	Arithmetic Operation 64bit	32	Bitwise OR with an immediate.
ORIW	Arithmetic Operation 32bit	32	32-bit word OR-immediate.
ORW	Arithmetic Operation 32bit	32	32-bit word bitwise OR.

P

Mnemonic	Group	Bits	Description
PRF	Load Register Offset	32	Loads a value from memory into a register.
PRFI.U	Load UnScaled	32	Loads a value from memory into a register.

R

Mnemonic	Group	Bits	Description
REM	Multi-Cycle ALU	32	Signed integer remainder.
REMU	Multi-Cycle ALU	32	Unsigned integer remainder.
REMUW	Multi-Cycle ALU	32	32-bit word unsigned remainder.
REMW	Multi-Cycle ALU	32	32-bit word signed remainder.
REV	Bit Operation	32	Bit-reversal operation.

S

Mnemonic	Group	Bits	Description
SB	Store Register Offset	32	Stores a register value to memory.
SB.PCR	Store Symbol	32	Stores a register value to memory.
SBI	Store Immediate Offset	32	Stores a register value to memory.
SC.B	Atomic Operation	32	Atomic memory read-modify-write operation.
SC.D	Atomic Operation	32	Atomic memory read-modify-write operation.
SC.H	Atomic Operation	32	Atomic memory read-modify-write operation.
SC.W	Atomic Operation	32	Atomic memory read-modify-write operation.
SCVTF	Format Convert	32	Instruction from the Format Convert group.
SD	Store Register Offset	32	Stores a register value to memory.
SD.ADD	Atomic Operation	32	Atomic memory read-modify-write operation.
SD.AND	Atomic Operation	32	Atomic memory read-modify-write operation.
SD.OR	Atomic Operation	32	Atomic memory read-modify-write operation.
SD.PCR	Store Symbol	32	Stores a register value to memory.
SD.SMAX	Atomic Operation	32	Atomic memory read-modify-write operation.
SD.SMIN	Atomic Operation	32	Atomic memory read-modify-write operation.
SD.U	Store Register Offset	32	Stores a register value to memory.
SD.UMAX	Atomic Operation	32	Atomic memory read-modify-write operation.
SD.UMIN	Atomic Operation	32	Atomic memory read-modify-write operation.
SD.XOR	Atomic Operation	32	Atomic memory read-modify-write operation.
SDI	Store Immediate Offset	32	Stores a register value to memory.
SDI.U	Store Immediate Offset	32	Stores a register value to memory.
SETC.AND	Set Commit Argument	32	Sets the block-commit condition.
SETC.ANDI	Set Commit Argument	32	Sets the block-commit condition.
SETC.EQ	Set Commit Argument	32	Sets the block-commit condition.
SETC.EQI	Set Commit Argument	32	Sets the block-commit condition.
SETC.GE	Set Commit Argument	32	Sets the block-commit condition.
SETC.GEI	Set Commit Argument	32	Sets the block-commit condition.
SETC.GEU	Set Commit Argument	32	Sets the block-commit condition.
SETC.GEUI	Set Commit Argument	32	Sets the block-commit condition.
SETC.LT	Set Commit Argument	32	Sets the block-commit condition.
SETC.LTI	Set Commit Argument	32	Sets the block-commit condition.
SETC.LTU	Set Commit Argument	32	Sets the block-commit condition.
SETC.LTUI	Set Commit Argument	32	Sets the block-commit condition.
SETC.NE	Set Commit Argument	32	Sets the block-commit condition.
SETC.NEI	Set Commit Argument	32	Sets the block-commit condition.
SETC.OR	Set Commit Argument	32	Sets the block-commit condition.
SETC.ORI	Set Commit Argument	32	Sets the block-commit condition.
SETC.TGT	SSR Access	32	Sets the block-commit condition.
SETRET	PC-Relative	32	Materializes a return address (ra) using a PC-relative offset. Used in call headers.
SH	Store Register Offset	32	Stores a register value to memory.
SH.PCR	Store Symbol	32	Stores a register value to memory.
SH.U	Store Register Offset	32	Stores a register value to memory.
SHI	Store Immediate Offset	32	Stores a register value to memory.
SHI.U	Store Immediate Offset	32	Stores a register value to memory.
SLL	Arithmetic Operation 64bit	32	Logical left shift by the value in SrcR.
SLLI	Arithmetic Operation 64bit	32	Logical left shift by an immediate amount.
SLLIW	Arithmetic Operation 32bit	32	32-bit word logical left shift (immediate).
SLLW	Arithmetic Operation 32bit	32	32-bit word logical left shift.
SRA	Arithmetic Operation 64bit	32	Arithmetic right shift by the value in SrcR.
SRAI	Arithmetic Operation 64bit	32	Arithmetic right shift by an immediate amount.
SRAIW	Arithmetic Operation 32bit	32	32-bit word arithmetic right shift (immediate).
SRAW	Arithmetic Operation 32bit	32	32-bit word arithmetic right shift.
SRL	Arithmetic Operation 64bit	32	Logical right shift by the value in SrcR.
SRLI	Arithmetic Operation 64bit	32	Logical right shift by an immediate amount.
SRLIW	Arithmetic Operation 32bit	32	32-bit word logical right shift (immediate).
SRLW	Arithmetic Operation 32bit	32	32-bit word logical right shift.
SSRGET	SSR Access	32	Instruction from the SSR Access group.
SSRSET	SSR Access	32	Instruction from the SSR Access group.
SSRSWAP	SSR Access	32	Instruction from the SSR Access group.
SUB	Arithmetic Operation 64bit	32	Integer subtraction.
SUBI	Arithmetic Operation 64bit	32	Instruction from the Arithmetic Operation 64bit group.
SUBIW	Arithmetic Operation 32bit	32	Instruction from the Arithmetic Operation 32bit group.
SUBW	Arithmetic Operation 32bit	32	32-bit word integer subtraction.
SW	Store Register Offset	32	Stores a register value to memory.
SW.ADD	Atomic Operation	32	Atomic memory read-modify-write operation.
SW.AND	Atomic Operation	32	Atomic memory read-modify-write operation.
SW.OR	Atomic Operation	32	Atomic memory read-modify-write operation.
SW.PCR	Store Symbol	32	Stores a register value to memory.
SW.SMAX	Atomic Operation	32	Atomic memory read-modify-write operation.
SW.SMIN	Atomic Operation	32	Atomic memory read-modify-write operation.
SW.U	Store Register Offset	32	Stores a register value to memory.
SW.UMAX	Atomic Operation	32	Atomic memory read-modify-write operation.
SW.UMIN	Atomic Operation	32	Atomic memory read-modify-write operation.
SW.XOR	Atomic Operation	32	Atomic memory read-modify-write operation.
SWAPB	Atomic Operation	32	Atomic memory read-modify-write operation.
SWAPD	Atomic Operation	32	Atomic memory read-modify-write operation.
SWAPH	Atomic Operation	32	Atomic memory read-modify-write operation.
SWAPW	Atomic Operation	32	Atomic memory read-modify-write operation.
SWI	Store Immediate Offset	32	Stores a register value to memory.
SWI.U	Store Immediate Offset	32	Stores a register value to memory.

T

Mnemonic	Group	Bits	Description
TLB.IA	Cache Maintain	32	Cache maintenance operation.
TLB.IALL	Cache Maintain	32	Cache maintenance operation.
TLB.IAV	Cache Maintain	32	Cache maintenance operation.
TLB.IV	Cache Maintain	32	Cache maintenance operation.

U

Mnemonic	Group	Bits	Description
UCVTF	Format Convert	32	Instruction from the Format Convert group.

V

Mnemonic	Group	Bits	Description
V.ADD	Arithmetic Operation	64	[64-bit V.] Integer addition.
V.ADDI	Arithmetic Operation	64	[64-bit V.] Instruction from the Arithmetic Operation group.
V.AND	Arithmetic Operation	64	[64-bit V.] Bitwise AND.
V.ANDI	Arithmetic Operation	64	[64-bit V.] Instruction from the Arithmetic Operation group.
V.BCNT	Bit Manipulation	64	[64-bit V.] Population count.
V.BIC	Bit Manipulation	64	[64-bit V.] Bit clear.
V.BIS	Bit Manipulation	64	[64-bit V.] Bit set.
V.BXS	Bit Manipulation	64	[64-bit V.] Bit-field extract signed.
V.BXU	Bit Manipulation	64	[64-bit V.] Bit-field extract unsigned.
V.CLZ	Bit Manipulation	64	[64-bit V.] Count leading zeros.
V.CMP.AND	Compare Instruction	64	[64-bit V.] Instruction from the Compare Instruction group.
V.CMP.ANDI	Compare Instruction	64	[64-bit V.] Instruction from the Compare Instruction group.
V.CMP.EQ	Compare Instruction	64	[64-bit V.] Instruction from the Compare Instruction group.
V.CMP.EQI	Compare Instruction	64	[64-bit V.] Instruction from the Compare Instruction group.
V.CMP.GE	Compare Instruction	64	[64-bit V.] Instruction from the Compare Instruction group.
V.CMP.GEI	Compare Instruction	64	[64-bit V.] Instruction from the Compare Instruction group.
V.CMP.GEU	Compare Instruction	64	[64-bit V.] Instruction from the Compare Instruction group.
V.CMP.GEUI	Compare Instruction	64	[64-bit V.] Instruction from the Compare Instruction group.
V.CMP.LT	Compare Instruction	64	[64-bit V.] Instruction from the Compare Instruction group.
V.CMP.LTI	Compare Instruction	64	[64-bit V.] Instruction from the Compare Instruction group.
V.CMP.LTU	Compare Instruction	64	[64-bit V.] Instruction from the Compare Instruction group.
V.CMP.LTUI	Compare Instruction	64	[64-bit V.] Instruction from the Compare Instruction group.
V.CMP.NE	Compare Instruction	64	[64-bit V.] Instruction from the Compare Instruction group.
V.CMP.NEI	Compare Instruction	64	[64-bit V.] Instruction from the Compare Instruction group.
V.CMP.OR	Compare Instruction	64	[64-bit V.] Instruction from the Compare Instruction group.
V.CMP.ORI	Compare Instruction	64	[64-bit V.] Instruction from the Compare Instruction group.
V.CSEL	Three Source Integer	64	[64-bit V.] Conditional select.
V.CTZ	Bit Manipulation	64	[64-bit V.] Count trailing zeros.
V.DIV	Division	64	[64-bit V.] Signed integer division.
V.FABS	Floating Point Arithmetic	64	[64-bit V.] Instruction from the Floating Point Arithmetic group.
V.FADD	Three-Source Floating Point	64	[64-bit V.] Instruction from the Three-Source Floating Point group.
V.FCLASS	Floating Point Arithmetic	64	[64-bit V.] Instruction from the Floating Point Arithmetic group.
V.FCVT	Format Convert	64	[64-bit V.] Instruction from the Format Convert group.
V.FCVTI	Format Convert	64	[64-bit V.] Instruction from the Format Convert group.
V.FDIV	Three-Source Floating Point	64	[64-bit V.] Instruction from the Three-Source Floating Point group.
V.FEQ	Two-Source Floating Point	64	[64-bit V.] Instruction from the Two-Source Floating Point group.
V.FEQS	Two-Source Floating Point	64	[64-bit V.] Instruction from the Two-Source Floating Point group.
V.FEXP	Floating Point Arithmetic	64	[64-bit V.] Instruction from the Floating Point Arithmetic group.
V.FGE	Two-Source Floating Point	64	[64-bit V.] Instruction from the Two-Source Floating Point group.
V.FGES	Two-Source Floating Point	64	[64-bit V.] Instruction from the Two-Source Floating Point group.
V.FLT	Two-Source Floating Point	64	[64-bit V.] Instruction from the Two-Source Floating Point group.
V.FLTS	Two-Source Floating Point	64	[64-bit V.] Instruction from the Two-Source Floating Point group.
V.FMADD	Three-Source Floating Point	64	[64-bit V.] Instruction from the Three-Source Floating Point group.
V.FMAX	Two-Source Floating Point	64	[64-bit V.] Instruction from the Two-Source Floating Point group.
V.FMIN	Two-Source Floating Point	64	[64-bit V.] Instruction from the Two-Source Floating Point group.
V.FMSUB	Three-Source Floating Point	64	[64-bit V.] Instruction from the Three-Source Floating Point group.
V.FMUL	Three-Source Floating Point	64	[64-bit V.] Instruction from the Three-Source Floating Point group.
V.FNE	Two-Source Floating Point	64	[64-bit V.] Instruction from the Two-Source Floating Point group.
V.FNES	Two-Source Floating Point	64	[64-bit V.] Instruction from the Two-Source Floating Point group.
V.FNMADD	Three-Source Floating Point	64	[64-bit V.] Instruction from the Three-Source Floating Point group.
V.FNMSUB	Three-Source Floating Point	64	[64-bit V.] Instruction from the Three-Source Floating Point group.
V.FRECIP	Floating Point Arithmetic	64	[64-bit V.] Instruction from the Floating Point Arithmetic group.
V.FSQRT	Floating Point Arithmetic	64	[64-bit V.] Instruction from the Floating Point Arithmetic group.
V.FSUB	Three-Source Floating Point	64	[64-bit V.] Instruction from the Three-Source Floating Point group.
V.ICVT	Format Convert	64	[64-bit V.] Instruction from the Format Convert group.
V.ICVTF	Format Convert	64	[64-bit V.] Instruction from the Format Convert group.
V.LB	Load Register Offset	64	[64-bit V.] Loads a signed 8-bit value from memory.
V.LB.BRG	Load Register Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LBI	Load Immediate Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LBI.BRG	Load Immediate Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LBU	Load Register Offset	64	[64-bit V.] Loads a 8-bit value from memory.
V.LBU.BRG	Load Register Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LBUI	Load Immediate Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LBUI.BRG	Load Immediate Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LD	Load Register Offset	64	[64-bit V.] Loads a 64-bit value from memory.
V.LD.ADD	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.LD.AND	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.LD.BRG	Load Register Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LD.MAX	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.LD.MIN	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.LD.OR	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.LD.XOR	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.LDI	Load Immediate Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LDI.BRG	Load Immediate Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LDI.U	Load UnScaled	64	[64-bit V.] Loads a value from memory into a register.
V.LDI.U.BRG	Load UnScaled	64	[64-bit V.] Loads a value from memory into a register.
V.LH	Load Register Offset	64	[64-bit V.] Loads a signed 16-bit value from memory.
V.LH.BRG	Load Register Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LHI	Load Immediate Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LHI.BRG	Load Immediate Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LHI.U	Load UnScaled	64	[64-bit V.] Loads a value from memory into a register.
V.LHI.U.BRG	Load UnScaled	64	[64-bit V.] Loads a value from memory into a register.
V.LHU	Load Register Offset	64	[64-bit V.] Loads a 16-bit value from memory.
V.LHU.BRG	Load Register Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LHUI	Load Immediate Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LHUI.BRG	Load Immediate Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LHUI.U	Load UnScaled	64	[64-bit V.] Loads a value from memory into a register.
V.LHUI.U.BRG	Load UnScaled	64	[64-bit V.] Loads a value from memory into a register.
V.LW	Load Register Offset	64	[64-bit V.] Loads a signed 32-bit value from memory.
V.LW.ADD	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.LW.AND	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.LW.BRG	Load Register Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LW.MAX	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.LW.MIN	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.LW.OR	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.LW.XOR	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.LWI	Load Immediate Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LWI.BRG	Load Immediate Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LWI.U	Load UnScaled	64	[64-bit V.] Loads a value from memory into a register.
V.LWI.U.BRG	Load UnScaled	64	[64-bit V.] Loads a value from memory into a register.
V.LWU	Load Register Offset	64	[64-bit V.] Loads a 32-bit value from memory.
V.LWU.BRG	Load Register Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LWUI	Load Immediate Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LWUI.BRG	Load Immediate Offset	64	[64-bit V.] Loads a value from memory into a register.
V.LWUI.U	Load UnScaled	64	[64-bit V.] Loads a value from memory into a register.
V.LWUI.U.BRG	Load UnScaled	64	[64-bit V.] Loads a value from memory into a register.
V.MADD	Multi-Cycle ALU	64	[64-bit V.] Instruction from the Multi-Cycle ALU group.
V.MAX	Two-Source Floating Point	64	[64-bit V.] Instruction from the Two-Source Floating Point group.
V.MIN	Two-Source Floating Point	64	[64-bit V.] Instruction from the Two-Source Floating Point group.
V.MUL	Multi-Cycle ALU	64	[64-bit V.] Integer multiply.
V.OR	Arithmetic Operation	64	[64-bit V.] Bitwise OR.
V.ORI	Arithmetic Operation	64	[64-bit V.] Instruction from the Arithmetic Operation group.
V.PSEL	Three Source Integer	64	[64-bit V.] Instruction from the Three Source Integer group.
V.QPOP	General Manager	64	[64-bit V.] Instruction from the General Manager group.
V.QPUSH	General Manager	64	[64-bit V.] Instruction from the General Manager group.
V.RDADD	Reduce Operation with Register	64	[64-bit V.] Instruction from the Reduce Operation with Register group.
V.RDAND	Reduce Operation with Register	64	[64-bit V.] Instruction from the Reduce Operation with Register group.
V.RDFADD	Reduce Operation with Register	64	[64-bit V.] Instruction from the Reduce Operation with Register group.
V.RDFMAX	Reduce Operation with Register	64	[64-bit V.] Instruction from the Reduce Operation with Register group.
V.RDFMIN	Reduce Operation with Register	64	[64-bit V.] Instruction from the Reduce Operation with Register group.
V.RDMAX	Reduce Operation with Register	64	[64-bit V.] Instruction from the Reduce Operation with Register group.
V.RDMIN	Reduce Operation with Register	64	[64-bit V.] Instruction from the Reduce Operation with Register group.
V.RDOR	Reduce Operation with Register	64	[64-bit V.] Instruction from the Reduce Operation with Register group.
V.RDXOR	Reduce Operation with Register	64	[64-bit V.] Instruction from the Reduce Operation with Register group.
V.REM	Division	64	[64-bit V.] Signed integer remainder.
V.REV	Bit Manipulation	64	[64-bit V.] Bit-reversal.
V.SB	Store Register Offset	64	[64-bit V.] Stores a register value to memory.
V.SB.BRG	Store Register Offset	64	[64-bit V.] Stores a register value to memory.
V.SBI	Store Offset	64	[64-bit V.] Stores a register value to memory.
V.SBI.BRG	Store Offset	64	[64-bit V.] Stores a register value to memory.
V.SD	Store Register Offset	64	[64-bit V.] Stores a register value to memory.
V.SD.ADD	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.SD.AND	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.SD.BRG	Store Register Offset	64	[64-bit V.] Stores a register value to memory.
V.SD.MAX	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.SD.MIN	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.SD.OR	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.SD.U	Store Register Offset	64	[64-bit V.] Stores a register value to memory.
V.SD.U.BRG	Store Register Offset	64	[64-bit V.] Stores a register value to memory.
V.SD.XOR	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.SDI	Store Offset	64	[64-bit V.] Stores a register value to memory.
V.SDI.BRG	Store Offset	64	[64-bit V.] Stores a register value to memory.
V.SDI.U	Store Offset	64	[64-bit V.] Stores a register value to memory.
V.SDI.U.BRG	Store Offset	64	[64-bit V.] Stores a register value to memory.
V.SH	Store Register Offset	64	[64-bit V.] Stores a register value to memory.
V.SH.BRG	Store Register Offset	64	[64-bit V.] Stores a register value to memory.
V.SH.U	Store Register Offset	64	[64-bit V.] Stores a register value to memory.
V.SH.U.BRG	Store Register Offset	64	[64-bit V.] Stores a register value to memory.
V.SHFL.BFLY	Shuffle	64	[64-bit V.] Instruction from the Shuffle group.
V.SHFL.DOWN	Shuffle	64	[64-bit V.] Instruction from the Shuffle group.
V.SHFL.IDX	Shuffle	64	[64-bit V.] Instruction from the Shuffle group.
V.SHFL.UP	Shuffle	64	[64-bit V.] Instruction from the Shuffle group.
V.SHFLI.BFLY	Shuffle	64	[64-bit V.] Instruction from the Shuffle group.
V.SHFLI.DOWN	Shuffle	64	[64-bit V.] Instruction from the Shuffle group.
V.SHFLI.IDX	Shuffle	64	[64-bit V.] Instruction from the Shuffle group.
V.SHFLI.UP	Shuffle	64	[64-bit V.] Instruction from the Shuffle group.
V.SHI	Store Offset	64	[64-bit V.] Stores a register value to memory.
V.SHI.BRG	Store Offset	64	[64-bit V.] Stores a register value to memory.
V.SHI.U	Store Offset	64	[64-bit V.] Stores a register value to memory.
V.SHI.U.BRG	Store Offset	64	[64-bit V.] Stores a register value to memory.
V.SLL	Arithmetic Operation	64	[64-bit V.] Logical left shift.
V.SLLI	Arithmetic Operation	64	[64-bit V.] Instruction from the Arithmetic Operation group.
V.SRA	Arithmetic Operation	64	[64-bit V.] Arithmetic right shift.
V.SRAI	Arithmetic Operation	64	[64-bit V.] Instruction from the Arithmetic Operation group.
V.SRL	Arithmetic Operation	64	[64-bit V.] Logical right shift.
V.SRLI	Arithmetic Operation	64	[64-bit V.] Instruction from the Arithmetic Operation group.
V.SUB	Arithmetic Operation	64	[64-bit V.] Integer subtraction.
V.SUBI	Arithmetic Operation	64	[64-bit V.] Instruction from the Arithmetic Operation group.
V.SW	Store Register Offset	64	[64-bit V.] Stores a register value to memory.
V.SW.ADD	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.SW.AND	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.SW.BRG	Store Register Offset	64	[64-bit V.] Stores a register value to memory.
V.SW.MAX	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.SW.MIN	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.SW.OR	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.SW.U	Store Register Offset	64	[64-bit V.] Stores a register value to memory.
V.SW.U.BRG	Store Register Offset	64	[64-bit V.] Stores a register value to memory.
V.SW.XOR	Atomic Operation	64	[64-bit V.] Atomic memory read-modify-write operation.
V.SWI	Store Offset	64	[64-bit V.] Stores a register value to memory.
V.SWI.BRG	Store Offset	64	[64-bit V.] Stores a register value to memory.
V.SWI.U	Store Offset	64	[64-bit V.] Stores a register value to memory.
V.SWI.U.BRG	Store Offset	64	[64-bit V.] Stores a register value to memory.
V.XOR	Arithmetic Operation	64	[64-bit V.] Bitwise XOR.
V.XORI	Arithmetic Operation	64	[64-bit V.] Instruction from the Arithmetic Operation group.

X

Mnemonic	Group	Bits	Description
XB	Bundle Split	32	Instruction from the Bundle Split group.
XOR	Arithmetic Operation 64bit	32	Bitwise XOR of two registers.
XORI	Arithmetic Operation 64bit	32	Bitwise XOR with an immediate.
XORIW	Arithmetic Operation 32bit	32	32-bit word XOR-immediate.
XORW	Arithmetic Operation 32bit	32	32-bit word bitwise XOR.