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Arithmetic Operation

Ch 12   ALU — Arithmetic Logic Unit  |  **Group:** Arithmetic Operation  |  **Forms:** 20  |  **Unique mnemonics:** 20

Extended integer arithmetic, including 64-bit forms and vector variants.

Instructions

Mnemonic Assembly Length Decode Description
C.ADD c.add srcL, srcR, ->t 16 [16-bit C.] Integer addition.
C.AND c.and srcL, srcR, ->t 16 [16-bit C.] Bitwise AND.
C.OR c.or srcL, srcR, ->t 16 [16-bit C.] Bitwise OR.
C.SUB c.sub srcL, srcR, ->t 16 [16-bit C.] Integer subtraction.
V.ADD v.add SrcL, SrcR<.neg><<<shamt>, ->Dst 64 [64-bit V.] Integer addition.
V.ADDI v.addi SrcL, uimm, ->Dst 64 [64-bit V.] Instruction from the Arithmetic Operation group.
V.AND v.and SrcL, SrcR<.not><<<shamt>, ->Dst 64 [64-bit V.] Bitwise AND.
V.ANDI v.andi SrcL, simm, ->Dst 64 [64-bit V.] Instruction from the Arithmetic Operation group.
V.OR v.or SrcL, SrcR<.not><<<shamt>, ->Dst 64 [64-bit V.] Bitwise OR.
V.ORI v.ori SrcL, simm, ->Dst 64 [64-bit V.] Instruction from the Arithmetic Operation group.
V.SLL v.sll SrcL, SrcR, ->Dst 64 [64-bit V.] Logical left shift.
V.SLLI v.slli SrcL, shamt, ->Dst 64 [64-bit V.] Instruction from the Arithmetic Operation group.
V.SRA v.sra SrcL, SrcR, ->Dst 64 [64-bit V.] Arithmetic right shift.
V.SRAI v.srai SrcL, shamt, ->Dst 64 [64-bit V.] Instruction from the Arithmetic Operation group.
V.SRL v.srl SrcL, SrcR, ->Dst 64 [64-bit V.] Logical right shift.
V.SRLI v.srli SrcL, shamt, ->Dst 64 [64-bit V.] Instruction from the Arithmetic Operation group.
V.SUB v.sub SrcL, SrcR<.neg><<<shamt>, ->Dst 64 [64-bit V.] Integer subtraction.
V.SUBI v.subi SrcL, uimm, ->Dst 64 [64-bit V.] Instruction from the Arithmetic Operation group.
V.XOR v.xor SrcL, SrcR<.not><<<shamt>, ->Dst 64 [64-bit V.] Bitwise XOR.
V.XORI v.xori SrcL, simm, ->Dst 64 [64-bit V.] Instruction from the Arithmetic Operation group.

See Also