Three-Source Floating Point¶
Ch 20
VEC — Vector / SIMD Execution (lx64) |
**Group:** Three-Source Floating Point |
**Forms:** 8 |
**Unique mnemonics:** 8
Three-source floating-point operations.
Instructions¶
| Mnemonic | Assembly | Length | Decode | Description |
|---|---|---|---|---|
| V.FADD | v.fadd SrcL, SrcR, ->Dst |
64 | — | [64-bit V.] Instruction from the Three-Source Floating Point group. |
| V.FDIV | v.fdiv SrcL, SrcR, ->Dst |
64 | — | [64-bit V.] Instruction from the Three-Source Floating Point group. |
| V.FMADD | v.fmadd SrcL, SrcR, SrcA, ->Dst |
64 | — | [64-bit V.] Instruction from the Three-Source Floating Point group. |
| V.FMSUB | v.fmsub SrcL, SrcR, SrcA, ->Dst |
64 | — | [64-bit V.] Instruction from the Three-Source Floating Point group. |
| V.FMUL | v.fmul SrcL, SrcR, ->Dst |
64 | — | [64-bit V.] Instruction from the Three-Source Floating Point group. |
| V.FNMADD | v.fnmadd SrcL, SrcR, SrcA, ->Dst |
64 | — | [64-bit V.] Instruction from the Three-Source Floating Point group. |
| V.FNMSUB | v.fnmsub SrcL, SrcR, SrcA, ->Dst |
64 | — | [64-bit V.] Instruction from the Three-Source Floating Point group. |
| V.FSUB | v.fsub SrcL, SrcR, ->Dst |
64 | — | [64-bit V.] Instruction from the Three-Source Floating Point group. |