Division

Ch 20   VEC — Vector / SIMD Execution (lx64)  |  **Group:** Division  |  **Forms:** 2  |  **Unique mnemonics:** 2

Signed and unsigned integer division.

Instructions

Mnemonic	Assembly	Length	Decode	Description
V.DIV	v.div SrcL, SrcR, ->Dst	64	—	[64-bit V.] Signed integer division.
V.REM	v.rem SrcL, SrcR, ->Dst	64	—	[64-bit V.] Signed integer remainder.

See Also

• Instruction reference · Groups Index
• Chapter 20: VEC — Vector / SIMD Execution (lx64)
• Encoding formats