Bit Manipulation¶
Ch 12
ALU — Arithmetic Logic Unit |
**Group:** Bit Manipulation |
**Forms:** 8 |
**Unique mnemonics:** 8
Bit manipulation operations (vector forms).
Instructions¶
| Mnemonic | Assembly | Length | Decode | Description |
|---|---|---|---|---|
| V.BCNT | v.bcnt SrcL, M, N, ->Dst |
64 | — | [64-bit V.] Population count. |
| V.BIC | v.bic SrcL, M, N, ->Dst |
64 | — | [64-bit V.] Bit clear. |
| V.BIS | v.bis SrcL, M, N, ->Dst |
64 | — | [64-bit V.] Bit set. |
| V.BXS | v.bxs SrcL, M, N, ->Dst |
64 | — | [64-bit V.] Bit-field extract signed. |
| V.BXU | v.bxu SrcL, M, N, ->Dst |
64 | — | [64-bit V.] Bit-field extract unsigned. |
| V.CLZ | v.clz SrcL, M, N, ->Dst |
64 | — | [64-bit V.] Count leading zeros. |
| V.CTZ | v.ctz SrcL, M, N, ->Dst |
64 | — | [64-bit V.] Count trailing zeros. |
| V.REV | v.rev SrcL, M, N, ->Dst |
64 | — | [64-bit V.] Bit-reversal. |