V.REV

64-bit V. **Group:** Bit Manipulation  |  Ch 12   ALU — Arithmetic Logic Unit  |  **Length:** 64  |  **Decode:** —

Assembly Syntax

• v.rev SrcL, M, N, ->Dst

Encoding

Bitfield encoding diagram. MSB is on the left, LSB on the right.

Description

[64-bit V.] Bit-reversal.

Pseudocode (informative)

// Execute V.REV as defined by the Bit Manipulation semantics.

Encoding Notes

No additional encoding notes.

Full Catalog Forms

Assembly	Length	Decode
v.rev SrcL, M, N, ->Dst	64	—

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