ADD¶
32-bit Base **Group:** Arithmetic Operation 64bit |
Ch 12
ALU — Arithmetic Logic Unit |
**Length:**
32 | **Decode:** —
Assembly Syntax¶
add SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>, ->{t, u, Rd}
Encoding¶
Description¶
Integer addition. Writes the sum of two registers to the destination.
Pseudocode (informative)¶
Encoding Notes¶
No additional encoding notes.
Full Catalog Forms¶
| Assembly | Length | Decode |
|---|---|---|
add SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>, ->{t, u, Rd} |
32 | — |
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