Skip to content

Store Pair

Ch 11   AGU — Address Generation Unit  |  **Group:** Store Pair  |  **Forms:** 14  |  **Unique mnemonics:** 14

Paired-store instructions.

Instructions

Mnemonic Assembly Length Decode Description
HL.SBIP hl.sbip SrcD, SrcD1, [SrcR, simm] 48 [48-bit HL.] Stores a register value to memory.
HL.SBP hl.sbp SrcD, SrcD1, [SrcL, SrcR<{.sw,.uw,.neg}>] 48 [48-bit HL.] Stores a register value to memory.
HL.SDIP hl.sdip SrcD, SrcD1, [SrcR, simm] 48 [48-bit HL.] Stores a register value to memory.
HL.SDIP.U hl.sdip.u SrcD, SrcD1, [SrcR, simm] 48 [48-bit HL.] Stores a register value to memory.
HL.SDP hl.sdp SrcD, SrcD1, [SrcL, SrcR<{.sw,.uw,.neg}><<3] 48 [48-bit HL.] Stores a register value to memory.
HL.SDP.U hl.sdp.u SrcD, SrcD1, [SrcL, SrcR<{.sw,.uw,.neg}>] 48 [48-bit HL.] Stores a register value to memory.
HL.SHIP hl.ship SrcD, SrcD1, [SrcR, simm] 48 [48-bit HL.] Stores a register value to memory.
HL.SHIP.U hl.ship.u SrcD, SrcD1, [SrcR, simm] 48 [48-bit HL.] Stores a register value to memory.
HL.SHP hl.shp SrcD, SrcD1, [SrcL, SrcR<{.sw,.uw,.neg}><<1] 48 [48-bit HL.] Stores a register value to memory.
HL.SHP.U hl.shp.u SrcD, SrcD1, [SrcL, SrcR<{.sw,.uw,.neg}>] 48 [48-bit HL.] Stores a register value to memory.
HL.SWIP hl.swip SrcD, SrcD1, [SrcR, simm] 48 [48-bit HL.] Stores a register value to memory.
HL.SWIP.U hl.swip.u SrcD, SrcD1, [SrcR, simm] 48 [48-bit HL.] Stores a register value to memory.
HL.SWP hl.swp SrcD, SrcD1, [SrcL, SrcR<{.sw,.uw,.neg}><<2] 48 [48-bit HL.] Stores a register value to memory.
HL.SWP.U hl.swp.u SrcD, SrcD1, [SrcL, SrcR<{.sw,.uw,.neg}>] 48 [48-bit HL.] Stores a register value to memory.

See Also