Load Pre-Index¶
Ch 11
AGU — Address Generation Unit |
**Group:** Load Pre-Index |
**Forms:** 19 |
**Unique mnemonics:** 19
Load with pre-index writeback.
Instructions¶
| Mnemonic | Assembly | Length | Decode | Description |
|---|---|---|---|---|
| HL.LB.PR | hl.lb.pr [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LBI.PR | hl.lbi.pr [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LBU.PR | hl.lbu.pr [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LBUI.PR | hl.lbui.pr [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LD.PR | hl.ld.pr [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LDI.PR | hl.ldi.pr [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LDI.UPR | hl.ldi.upr [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LH.PR | hl.lh.pr [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LHI.PR | hl.lhi.pr [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LHI.UPR | hl.lhi.upr [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LHU.PR | hl.lhu.pr [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LHUI.PR | hl.lhui.pr [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LHUI.UPR | hl.lhui.upr [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LW.PR | hl.lw.pr [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LWI.PR | hl.lwi.pr [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LWI.UPR | hl.lwi.upr [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LWU.PR | hl.lwu.pr [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LWUI.PR | hl.lwui.pr [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LWUI.UPR | hl.lwui.upr [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |