Load Pair¶
Ch 11
AGU — Address Generation Unit |
**Group:** Load Pair |
**Forms:** 19 |
**Unique mnemonics:** 19
Paired-load instructions that read two consecutive values.
Instructions¶
| Mnemonic | Assembly | Length | Decode | Description |
|---|---|---|---|---|
| HL.LBIP | hl.lbip [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LBP | hl.lbp [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LBUIP | hl.lbuip [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LBUP | hl.lbup [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LDIP | hl.ldip [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LDIP.U | hl.ldip.u [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LDP | hl.ldp [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LHIP | hl.lhip [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LHIP.U | hl.lhip.u [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LHP | hl.lhp [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LHUIP | hl.lhuip [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LHUIP.U | hl.lhuip.u [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LHUP | hl.lhup [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LWIP | hl.lwip [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LWIP.U | hl.lwip.u [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LWP | hl.lwp [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LWUIP | hl.lwuip [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LWUIP.U | hl.lwuip.u [SrcL, simm], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |
| HL.LWUP | hl.lwup [SrcL, SrcR<{.sw,.uw,.neg}><<<shamt>], ->Dst0, Dst1 |
48 | — | [48-bit HL.] Loads a value from memory into a register. |